中圖分類號(hào)：TP311.1 文獻(xiàn)標(biāo)志碼：A DOI: 10.16157/j.issn.0258-7998.223423 中文引用格式： 符超，吳翼虎，錢宏文. 基于多核DSP上下文環(huán)境備份與恢復(fù)方案的設(shè)計(jì)與實(shí)現(xiàn)[J]. 電子技術(shù)應(yīng)用，2023，49(8)：114-118. 英文引用格式： Fu Chao，Wu Yihu，Qian Hongwen. Design and implementation of context backup and resume scheme based on multi-core DSP[J]. Application of Electronic Technique，2023，49(8)：114-118.
Design and implementation of context backup and resume scheme based on multi-core DSP
Fu Chao，Wu Yihu，Qian Hongwen
(No.58 Research Institute， China Electronics Technology Group Corporation， Wuxi 214035， China)
Abstract： In software-defined computing architectures, DSP, as a commonly used hardware resource, is bound to develop virtualization in order to maximize its performance. This paper proposes a multi-core DSP context environment backup and resume scheme, with core 0 as the control core, through reasonable memory allocation and read/write operations, the states of remaining core in the calculation process, such as register state, stack state, data state, and program state, are saved and written back, achieved the function of switching from computing task M to computing task N, and then switching back to M after N is completed. Using TI 66AK2H14 to verify its feasibility. This scheme provides practical methods and experience for the flexible application of multi-core DSP hardware resources.
Key words : multi-core DSP；context；backup；resume
0 引言
近年來(lái)，從國(guó)內(nèi)外研究人員的研究成果來(lái)看，面向特定應(yīng)用領(lǐng)域的軟件定義計(jì)算體系架構(gòu)已經(jīng)成為未來(lái)計(jì)算體系架構(gòu)演進(jìn)的重要方向[1]。軟件定義計(jì)算要求將硬件資源虛擬化，各硬件之間以軟件互連，將計(jì)算能力以異構(gòu)的可重構(gòu)的節(jié)點(diǎn)的形式提供給上層用戶，在完成定制化功能的前提下，實(shí)現(xiàn)系統(tǒng)運(yùn)行效率最大化。數(shù)字信號(hào)處理器（Digital Signal Processor, DSP）作為異構(gòu)計(jì)算不可或缺的一環(huán)，必將扮演越來(lái)越重要的角色。
